a programmable decimation and interpolation ratio module onnected with multistage cascade integrator comb (cic) filter is designed to implement high efficient decimator and interpolator.
将可编程抽取、插值器与多级积分梳状滤波器(cic)相配合,实现高效数字抽取和插值模块。
this paper proposes a modified cic decimator architecture. it can decrease the sample rate and the power by polyphase decomposition method;