a high frequency low power divide-by-2 injection-locked frequency divider is presented.
设计了一个高频低功耗的注入锁定二分频器。
the theory of operation for a very high-speed ecl multi-modul frequency divider and its circuit and layout design are described. along with its fabrication process.
本文着重介绍一种超高速ecl多模分频器的电路原理、电路设计、版图设计、工艺设计及研制结果。
a programmable multi-modulus frequency divider is designed and implemented in a 0.
多模基带处理器是一种兼容多标準的通信平台。
the cnc fineinterpolator based on pulse multiplication has its inherent error, which caused by the rounding of frequency divider parameters.
基于脉沖乘法器原理的精插补器存在理论误差,产生误差的原因是分频数圆整造成的。
experiment of fourfold frequency divider proved the feasibility and validity of the method.
四倍分频器电路演化实验结果验证了该方法的可行性与有效性。
this paper gives out a design of the equal duty ratio arbitrary integer frequency divider based on fpga.
给出了一种基于fpga的等占空比任意整数分频电路的设计方法。
the logic and circuit design of a very high speed ecl programmable frequency divider is described.
介绍一种ecl高速程控分频器的逻辑设计、电路设计及研制结果。
project 1 will be focused on the design and spice simulation of a high speed frequency divider for phase-locked loop applications.
专题1主要是讨论用于相锁迴路应用的高速分频器设计和spice模拟。
completion of the master clock frequency divider quarter, we want to help.
说明:对主时钟的完成四分频的分频,希望对大家有帮助。
the comparison of digital frequency divider and traditional analog frequency divider shows that the former is more superadded.
比较了数字分频器与传统模拟分频器,说明数字分频器更具优点。
with the development of cmos process, design of super high speed frequency divider based on cmos process makes great sense.
在此情况下,超高速的分频器是工作在最高频率的电路之一,起着至关重要的作用。
this article introduces the reader to the electronic frequency divider of the two - principles calculation and production.
本文向读者介绍电子分频器二分频的原理计算和制作。
applications of decimal fraction frequency divider in the area such as direct digital frequency synthesis technology and stepper motor drive speed controller a re introduced.
在此基础上,介绍了小数分频器在直接数字频率合成技术和步进电机驱动速度控制中的两种常见应用。
the pll includes a phase frequency detector, a charge pump, a low pass filter, a voltage controlled oscillator and a frequency divider .
该pll电路由一个鑒频鑒相器电路、一个电荷泵、一个低通滤波器、一个压控振蕩器和分频器组成。
the generator is composed of input shaping circuit, frequency divider circuit, numeric switch phrase shifter circuit, delay second formation circuit, local second formation circuit and so on.
该产生器由输入整形、分频器、数字开关移相器、延迟秒形成、本地秒形成等电路组成。
the development of very high speed frequency divider ic's over the decade is summarized in the paper.
本文综述了国外近十年来超高速分频器集成电路的发展概况。
finally, a brief introduction to the applications of the very high speed frequency divider is given.
最后简单介绍了超高速分频器的应用情况。