parasitic capacitance中文,parasitic capacitance的意思,parasitic capacitance翻译及用法

2026-03-22 00:54 浏览次数 15

parasitic capacitance

英[ˌpærəˈsɪtɪk kəˈpæsɪtəns]美[ˌpærəˈsɪtɪk kəˈpæsɪtəns]

[电子] 寄生电容

parasitic capacitance 片语

片语

3D interconnect parasitic capacitanceD互连寄生电容

3D parasitic capacitance三维寄生电容

Parasitic resistance & capacitance寄生电阻

-d parasitic capacitanced寄生电容

parasitic feedback capacitance寄生反馈电容

spurious capacitance[电子] 寄生电容;散电容

3 d parasitic capacitanced互连电容快速

LED parasitic capacitance of发光二极管寄生电容

d interconnect parasitic capacitanced互连寄生电容

valve parasitic capacitance电子管寄生电容

parasitic capacitance 例句

英汉例句

  • the noise performance and impedance matching are optimized with rf input parasitic capacitance in consideration.

    在考虑输入寄生的前提下,对射频输入端的阻抗匹配和噪声性能进行了优化;

  • a new model has been developed for the determination of the electrode and interconnection parasitic capacitance using moment method and free space green「s function of rectangularsubarea.

    本文以矩量法和矩形面元上的自由空间格林函数为基础,采用多电像法给出一个计算电极,互联线寄生电容的新模型。

  • due to the parasitic capacitance and weak output signal, which is limited by its dimensions, it is difficult to improve the resolution and stability of micro accelerometer efficiently.

    在测量硅微电容式加速度传感器时,由于器件信号的微弱和寄生电容的干扰,提高加速度的稳定性和分辨率非常困难。

  • effects of the parasitic capacitance on the frequency response of the filter are studied.

    分析了晶体管的寄生电容对此滤波器频率特性的影响。

  • a novel configuration of a mos varactor is designed for good linearity of kvco, as well as a new digital capacitor controlled array topology with lower parasitic capacitance and lower ron.

    通过改变mos变容管的接入方法实现了更好的压控增益线性度,并采用了新的低寄生电容、低导通电阻的数控电容阵列结构来补偿工艺变化带来的频率变化。

  • in this paper, the background of parasitic capacitance extraction of interconnects are briefly introduced.

    对互连寄生电容提取的研究背景进行了简要的介绍。

  • this paper introduces an inexpensive and applied resonance boosting method by using gis bus line parasitic capacitance and reactor connected in series, and also its principle and realization.

    本文介绍了一种经济实用的利用gis母线寄生电容串联电抗器谐振升压的原理及实现。

  • a vertical cavity surface emitting laser capable of reducing parasitic capacitance while suppressing power consumption, and a method of manufacturing thereof are provided.

    本发明涉及一种垂直腔面发射激光器及其制造方法,该垂直腔面发射激光器能够减小寄生电容同时抑制功耗。

  • electricity charges and discharges from the multi-layer cabling」s parasitic capacitance when signal is transferred among different parts of integrated circuit.

    通过集成电路各器件间的布线传递信号的过程,是将信号电荷向布线间形成的寄生电容充放电的过程。

  • the quasi multiple medium (qmm), based on the direct boundary element method, is a fast algorithm for parasitic capacitance extraction.

    虚拟多介质是一种基于直接边界元的寄生电容快速提取方法。

  • we insert a parasitic capacitance patch on the rear of the layer in order to adjust the impedance of antenna.

    同时在天线臂之间加入了寄生电容,实现阻抗调整的作用。

  • the orthogonal coupling error, non-linear of the drive mode, temperature effect and parasitic capacitance of a fully-symmetrical micro gyroscope are test and analyzed in this paper.

    本文针对一种全对称微机械陀螺,对其正交耦合误差、驱动非线性、温度特性以及寄生电容来源进行了测试与分析。

  • we have proposed the effective capacitance model of two neighbor metals in on-chip inductors, and calculate the parasitic capacitance of serial multilayer inductors.

    提出了电感中金属间寄生电容等效模型,并且具体计算了两种硅基串联叠层电感的等效电容;

  • this may be caused by many factors, and the parasitic capacitance of igbt is proved to be the key by the experiment and the analysis.

    通过实验和理论分析可以证明,其主要起因是igbt的寄生电容。

  • the structure can reduce the parasitic capacitance of the sensor, improve the negative resistance characteristics of the sensitive film, and be used in micro gyroscope.

    该结构降低了器件的寄生电容,改善了敏感薄膜的负阻特性,适用于共振隧穿效应陀螺。

  • at last, the source of the parasitic capacitance is analyzed. the parasitic capacitance's value is calculated and the model is build.

    建立了全对称微机械陀螺寄生电容模型,分析了陀螺结构中寄生电容的来源并计算了电容值的大小。

  • the lna design method which absorbs the parasitic capacitance of esd is introduced and compared with the traditional design method.

    同时提出了将esd的寄生电容吸收到lna输入匹配网络中的设计方式,并与传统的计算方式做了对比。

  • in addition, as the result of optimizing alu, system resources are saved and parasitic capacitance is minimized, and the aim of reducing power consumption is achieved accordingly.

    另外,通过对算术逻辑单元进行优化设计,节省了系统的资源,减小了电路的寄生电容,从而达到了降低功耗的设计目标。

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