system board
系统板;主机板
2025-11-25 04:44 浏览次数 12
系统板;主机板
experimental introduction of the sp3 system board structure and layout, and user guides .
介绍了sp3实验板的系统结构和布局,用户指南。
figure 4 shows the network stream throughput and cpu utilization for the netserver scalability test runs while utilizing the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图4显示netserver可伸缩性测试的网络流吞吐量和系统 cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
the paper uses dsp system board designed by ourselves. its main task is data process real-time control and expert fuzzy neural network control scheme.
采用了自行设计的dsp系统板,它主要完成数据处理及实时控制以及专家模糊神经网络的控制方案。
the main goal is to design a dspminimum system board for this paper.
dsp最小系统板硬件设计是本次论文的主要任务。
figure 8 shows the network stream throughput and cpu utilization for the netperf scalability test runs while utilizing the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图8显示netperf可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
the second netserver scalability test used all four system board ethernet adapters on the first two nodes and the third test used all eight system board ethernet adapters on all four nodes.
第二个netserver可伸缩性测试使用前2 个节点上的所有4 个系统板载以太网适配器,第三个测试使用所有4 个节点上的所有8 个系统板载以太网适配器。
figure 5 shows the network stream throughput and cpu utilization for the netperf scalability test runs while using the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图5显示netperf可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
by studying and analyzing the functional properties of embedded microprocessor unit of lpc2378 and ocm12864-1 lcd module, a lcd menu display system based on lpc2378 system board has been constructed.
通过分析和研究嵌入式微处理器lpc2378和液晶模块ocm12864-1的功能特点, 利用自主设计lpc2378系统板和ocm12864-1液晶模块构建了一个菜单显示系统。
figure 11 shows the network stream throughput and cpu utilization for the netperf scalability test runs while utilizing the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图11显示netperf可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
figure 6 shows the network stream throughput and cpu utilization for the bidirectional scalability test runs while using the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图6显示双向可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
if you feel comfortable with it, try checking the power configuration options in your system board setup.
如果你觉得不舒服,请检查您的系统板安装电源配置选项。
the first of the netserver scalability tests utilized a single instance of netserver on each of the two system board ethernet adapters on the first node of the sut.
第一个netserver可伸缩性测试在sut的第一个节点的两个系统板载以太网适配器上各使用一个netserver实例。
figure 3 shows the network stream throughput and cpu utilization for the bidirectional scalability test runs while using the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图3显示双向可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
the ibis model is used to help get exact information in the integrity constraint design of system board level or multiple board level signals for analysis and calculation .
ibis模型可以帮助设计者在系统板级或多板信号完整性约束的设计中获取準确的信息,以进行分析和计算。
figure 12 shows the network stream throughput and cpu utilization for the test runs while using the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图12显示测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
the hardware components of the system are divided into two parts: minimum system board and expansion board.
整个系统的硬件组成分为两个部分——最小系统板与扩展板。
figure 1 shows the network stream throughput and cpu utilization for the netserver scalability test runs while using the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图1显示netserver可伸缩性测试的网络流吞吐量和系统 cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
figure 9 shows the network stream throughput and cpu utilization for the bidirectional netserver scalability test runs while using the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图9显示双向可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
figure 10 shows the network stream throughput and cpu utilization for the netserver scalability test runs while utilizing the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图10显示netserver可伸缩性测试的网络流吞吐量和系统 cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。
minimum system board with the electrical schematic diagram of the simulation system has.
最小系统板与电模拟系统的原理图都有。
this paper mainly analyzes the application of the ibis model in the system board design and system clock design for mobile computers.
本文主要分析了ibis模型在移动微机板参设计和在系统时钟设计中的应用。
they are the one's that can be programmed and reconfigured the logic functions while on the system board which is suitable for faster prototyping.
它支持在系统编程,在系统重构器件的逻辑功能,很适合产品的样机开发。
figure 2 shows the network stream throughput and cpu utilization for the netperf scalability test runs while utilizing the system board ethernet adapters on 1, 2, and 4 nodes of the sut.
图2显示netperf可伸缩性测试的网络流吞吐量和系统cpu利用率,分别使用sut 中1、2和4 个节点上的系统板载以太网适配器。