Base on the existing synchronous sequential circuits fault simulator-HOPE, the test vector generation method of sequential circuits based on ant algorithm is systematically researched firstly.
本文在同步时序电路故障模拟器—HOPE的基础上,率先对基于蚂蚁算法的时序电路测试矢量生成方法作了系统的开拓性研究。
Circuits described are modeled to behavior sets after abstraction, and can be replaced by their behavior sets during functional test vector generation procedures.
通过抽象,电路可以规范为行为集,并代替电路本身进行功能测试向量的生成。
This paper studies a test vector generation algorithm for digital circuits which can locate the component faults.
结合一个实际电路,研究了一种可把数字电路故障定位到器件级的测试向量生成算法。
A new BIST structure with the method of test vector generation based on a controlled LFSR is proposed.
本文提出了一种基于受控线性反馈移位寄存器(LFSR)进行内建自测试的结构及其测试矢量生成方法。