a design of high speed backplane bus is introduced in this paper.
介绍了一个高速背板总线的设计尝试。
the problems of backplane bus design, such as the driver, timing and signal integrate, have solved by using the gtl transceivers, phase adjustment of the clock and combined match techniques.
采用新型的gtl总线收发器、时钟相位调节和组合式匹配等技术措施,解决了总线设计的驱动、时序和信号完整性问题。
vxi bus is the perfect instrument platform for multi-dsp parallel processing. the design method of interface between vxi backplane bus and dsps is one of the key technologies.
vxi总线是支持多dsp并行处理的理想仪器平台,vxi总线至dsp的接口逻辑设计是仪器设计的关键技术之一。
a multiprocessor backplane bus contains a separate internet network.
一个多处理器的主板总线包含一个独立的内部网络。