片语

Clock duty cycle占空比

single-clock-cycle单时钟周期

clock period[电子] 时钟周期；时钟脉沖周期

Timer input clock cycle定时器在一个工作周期

clock tick时钟周期

Clock duty cycle stabilizer时钟稳定电路

clock interrupt cycle时钟中断周期

ccs clock cycle start时钟周期起始

clock k cycle clock rate时钟周期

clock cycle start时钟周期起始

clock cycle per instruction指令执行的时钟周期数

英汉例句

• the power5 microprocessor doubles that throughput by collecting two groups of up to five instructions per clock cycle and completing two groups per clock cycle.

  power5微处理器使此吞吐量增加了一倍，每个时钟周期收集两组指令（每组最多有五个），并在每个时钟周期内完成两组指令。

• what cck does is to apply sophisticated mathematical formulas to the dsss codes, permitting the codes to represent a greater volume of information per clock cycle .

  cck所做的工作是把复杂的数学公式应用于dsss代码，以允许该代码在每个时钟周期表示更多的信息。

• the power4 microprocessor collects a group of up to five instructions per clock cycle and can complete one group of instructions per clock cycle.

  power4微处理器每个时钟周期收集一组指令（最多有 5 个），并在每个时钟周期内完成一组指令。

• a microprocessor clock cycle in which nothing occurs .

  等待状态微处理器不执行任何动作的时钟周期。

• instruction 4 can be issued in the clock cycle immediately after instruction 3 because it does not require the result of instruction 3 to execute. you can visualize it like this

  指令4可以在指令3之后紧接的那个时钟周期执行，因为它不需要指令3的结果来执行。

• another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle .

  另一个独特的构架特性是内存系统，它允许一个取指，并在同一时间，每一个核可以读取数据在每一个单独的时钟周期内。

• if the necessary translation information is in the hardware-managed tlb, the system can carry out the address translation in one clock cycle without accessing the page table.

  采用硬件机构tlb来加快转换过程，使得地址转换大多数情况下能在一个时钟周期内完成；

• a microprocessor clock cycle in which nothing occurs.

  一个处理器的时钟周期内，没有发生。

• stall -- a clock cycle where the processor does not begin a new instruction.

  暂停（stall） ——处理器不开始执行新指令处的时钟周期。