clock frequency中文,clock frequency的意思,clock frequency翻译及用法

2025-09-06 19:12 浏览次数 6

clock frequency

英[klɔk ˈfri:kwənsi]美[klɑk ˈfrikwənsi]

[电子] 时钟频率,[计] 时钟脉沖频率

clock frequency 片语

片语

clock feedthrough frequency compensation时钟馈通频率补偿

Atomic Clock & Frequency Standard原子钟

clock base frequency test时钟基频测试

clock pulses frequency节拍脉沖频率

clock base frequency时钟基频

Clock Pulse Frequency节拍脉沖频率

clock speed时钟速度,时钟频率

clock k frequency时钟频率

clock signal frequency计时信号频率

clock feedthrough frequency compensation method时钟馈通频率补偿方案

clock rate[电子] 时钟频率

clock frequency 例句

英汉例句

  • this article mainly addresses the maintenance period of clock frequency of spc exchanges in china「s telecommunication network.

    本文主要讨论我国电信网中程控交换局时钟频率维护周期的确定问题。

  • therefore, the clock frequency directly affect the speed of mcu, clocking circuit and the quality of directly influence the stability of single-chip microcomputer system.

    因此,时钟频率直接影响单片机的速度,时钟电路的质量也直接影响单片机系统的稳定性。

  • the mc-cdma performance in the presence of a carrier frequency offset or a clock frequency offset is a rapidly decreasing function of the number of carriers.

    在载波频率偏移或时钟频率偏移作用下,系统性能呈迅速下降趋势,并且严重依赖于载波数量。

  • dynamic voltage scaling (dvs) technique is an effective way to reduce processor energy consumption through changing the processor」s supply voltage and clock frequency at the runtime.

    动态电压缩放技术是一种能有效优化处理器能耗的方法,它允许处理器在运行时动态地改变其时钟频率和供电电压。

  • meanwhile, the switched capacitor notch filter is designed, which can adjust center frequency freely by changing the switching clock frequency and make the center frequency highly accurate and stable.

    介绍了数字化开关电容滤波技术,并设计了可以通过改变开关时钟频率来自由调整中心频率的开关电容带阻滤波器,使中心频率具有很高的精度和稳定度。

  • the clock frequency is 1 mhz. the device samples sensor-read data during the write operation.

    时钟频率为1兆赫。在写操作的过程中,设备从传感器独处的数据总取样。

  • the external clock frequency applied to the ad7764 determines the sample rate, filter corner frequencies, and output word rate.

    ad7764的采样速率、滤波器转折频率和输出字速率由外部时钟频率决定。

  • the frame rate of video and warp of audio pcm clock frequency are discussed at last.

    最后,对视频帧率和音频pcm时钟的偏差等问题作了进一步的探讨。

  • suppose that enable is high, the counter counts up every clock cycle, and the frequency of the pwm output is the clock frequency divided by 2 count bits.

    假设高信号使能,计数器每个时钟周期进行计数,pwm输出的频率为时钟频率的2次幂分频。

  • studies have shown that star clock resonant cavity temperature fluctuations in the satellite clock frequency of long-term stability of the main factors.

    因此,为了得到更高的频率长期稳定度,提高星钟谐振腔的温度稳定度是非常有必要的。

  • if maximum performance is required, a crystal must be used to ensure the maximum clock frequency is approached but not exceeded.

    如果需要最佳性能,必须保证晶振趋近于时钟频率,但是不能大于时钟频率。

  • a second reason why clock frequency will no longer be an accurate measure of performance is that distributing the clock's signal to all the different parts of a chip is more difficult that it sounds.

    时钟频率不再是性能的精确测量指标的第二个原因是,将时钟信号分配到芯片的不同部分,要比说说困难得多。

  • for multiple-antenna ofdm systems, a clock frequency offset detection algorithm is presented. the algorithm can work before carrier frequency offset compensation.

    针对多天线ofdm系统提出一种可用于频率选择性衰落信道的时钟频偏估计算法,这种算法可以在存在载波频偏的情况下工作。

  • adding parallelism typically increases gate count, but the improved computational efficiency allows for the lower clock frequency needed to meet real-time constraints.

    添加并行一般通过门数增加来实现,但提高计算效率要求降低时钟频率以满足实时需求。

  • best frequency relation is given between if coherent oscillating source and clock frequency of full coherent radar.

    给出了全相参雷达频率源的中频相干振蕩源及时钟频率之间的最佳频率关系。

  • the minimum clock frequency is established by leakage on the auto-zero and reference caps.

    最小的时钟频率,由自动归零和基準电容的泄漏值确定。

  • this is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.

    这是因为进程执行现在需要跨总线协调,以一半的芯片时钟频率进行处理。

  • the sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the ad7763.

    采样速率、滤波器转折频率和输出字速率由ad7763的外部时钟频率与配置寄存器共同设置。

  • in deep submicron era, ic design in physical design has more and more challenge, with the increasing design scale, faster clock frequency and minimizing process dimension.

    在深亚微米时代,随着设计规模变大,时钟频率越来越高以及工艺尺寸的减小,ic物理设计面临着诸多困难。

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