it is a very high speed vlsi design through the pipeline architecture with power optimization.
该设计采用流水线处理结构,能达到非常快的处理速度,同时进行了功耗优化。
the ad9200 uses a multistage differential pipeline architecture at 20 msps data rates and guarantees no missing codes over the full operating temperature range.
它采用多级差分流水线架构,数据速率达20msps,在整个工作温度范围内保证无失码。
compilers are constructed in a pipeline architecture made up of several stages that communicate different forms of data (see figure 2).
by using the pipeline architecture in the whole design, the frequency of the system clock increases, and put the data into three operations which include storage, multiplying window, performing fft.
整个设计采用流水方式,提高了系统时钟频率,对数据完成了缓存、加窗、快速傅立叶变换处理。
the radix-2 decimation-in-time algorithm based on 16-bit fixed-point operation and pipeline architecture are adopted in the core module ifft(inverse fast fourier transform).
核心模块快速傅立叶逆变换(ifft)采用基于16位定点运算的基-2时间抽取算法和流水线结构。
this paper introduces the conception of a pseudo-4-stage pipeline architecture and implements it in the controller of a microprocessor.
提出了伪四级流水结构概念,并在一种微处理器控制器中实现运用。
a voltage scaling a/d converter with improved pipeline architecture is presented in the paper.
文章介绍了流水线电压型结构a/d转换器的一种改进设计。
this paper introduces the history of the gpu firstly, and then it analyses the pipeline architecture of gpu. finally, it introduces several types of program languages of gpu.
本文首先介绍了可编程图形硬件的发展,然后分析了它的流水线结构,最后介绍了几种最新的编程语言。
building on pipeline architecture
以管道架构为基础进行构建
xml pipeline architecture is the idea of effective xml data flow as a set of small, well-defined processing stages (largely, transforms).
xml管道架构是将有效的xml数据流当成一系列定义良好、较小的处理阶段(主要是转换)的思想。
the way adopted pipeline architecture and changed 2-d dct/idct to two 1-d dct/idct based on characteristic of row-column decomposition.