片语

RTL算法RTL algorithm

RTL Biathlon滑雪射击

RTL rectal直肠的

RTL L寄存器转送级

RTL gate电阻

RTL Strategy实时物流战略

rtl optimizationrtl优化

RTL综合RTL synthesis

RTL Exception异常类

英汉例句

• To erase the bootless power dissipation of the redundant leap of the clock, this paper proposes the RTL design of double edge triggered counter using parallelism and pipeline technique.

  该文从消除时钟信号冗余跳变而致的无效功耗的要求出发，提出了应用并行技术和流水线技术，实现基于RTL级的双边沿触发计数器的设计。

• Because the behaviors of digital system can be described by register transfer level (RTL) behavior exactly, RTL synthesis becomes the mainstream design method in EDA domain.

  由于寄存器传输级(rtl)行为描述可以精确地确定数字系统的操作，所以寄存器传输级综合成为当前EDA行业的主流设计方法。

• Cooperate and involve into new project team to improve supplier performance to achieve RTL target.

  协作并置身于新项目团队，改进供应商绩效，以达到RTL的目标。

• The company「s capabilities cover the entire IC design spectrum from RTL design, though verification, emulation and DFT to physical implementation, and include power analysis and yield management.

  公司设计能力涵盖从RTL设计、验证、仿真和DFT到物理实现的整个IC设计体系，并且包括功耗分析和良率管理。

• An alternative way to solve this is to formally prove that the RTL code and the netlist synthesized from it have exactly the same behavior in all cases.

  另一种方式来解决，这是正式证明，RTL代码和网表合成具有完全相同的行为在所有的案件。

• But critics say RTL is still too dependent on traditional ad-supported broadcasting and must do more to avoid being overwhelmed by the same online tsunami that has devastated the music business.

  但批评者认为，RTL仍过于依赖于传统的广告支持广播和必须做更多以避免被在线音乐的沖击倒。

• The design includes system level design, RTL level design and logic synthesis.

  设计工作包括系统级设计、RTL级设计、逻辑综合。

• The work of this dissertation is to complete the RTL design and verification of CLB-PVCI bus bridge after studying and analyzing the CLB bus protocol and PVCI protocol.

  本论文工作就是在研究和分析CLB总线协议和PVCI协议的基础上，完成CLB -PVCI总线桥的RTL设计和验证。

• This paper constructs the function simulation platform for buffer manager and the whole system, and validates the design on the platform after the RTL design.

  在完成该单元的RTL级设计的基础上，进一步构建了该单元及整个系统的功能仿真平台，在该平台上验证了设计的正确性。

• Sequential logic synthesis is an important part of RTL synthesis system design.

  时序逻辑综合是RTL综合系统设计中的一个重要部分。

• In theory, a logic synthesis tool guarantees that the first netlist is logically equivalent to the RTL source code.

  在理论上，逻辑综合工具，保证第一网表是合乎逻辑相当于RTL源代码。

• The problem with RTL is that the optimizations it enables are those close to the target.

  RTL的问题是，它支持的优化是接近于目标的。

• RTL and FPGA are used to validate high-level models while software tools are used for tasks such as workload analysis.

  RTL和FPGA主要用于验证高级语言模型，各种辅助工具可以用于工作负载的分析和优化。

• 「The news from medical staff is good, he」s leaving today, which proves that it「s fine,」 Patrick Devedjian, the minister on charge of France」s fiscal recovery plan, told French radio RTL on Monday.

  法国振兴经济部部长帕特里克·德维让今天对法国媒体说：「从医院传来的消息是一切正常，他今天就会出院，这一点也可以证明。」

• As the behavior of digital system can be fully described by the register transfer level (RTL) behavior descriptor, so RTL synthesis has become the mainstream design method in EDA domain.

  寄存器传输级(rtl)综合实现从rtl行为描述到门级结构描述的转换，是目前EDA设计行业的主流设计方法。

• To do this, the optimizer uses the RTL to create fast or more compact code (or both, when possible).

  为此，优化器使用RTL创建快速的或紧凑的代码（或者两者兼顾）。

• MrVan den Berg presented a case study of Z24, which is a joint venturebetween FD Mediagroep, RTL Nederland and Schibsted and is based onSchibsted’s successful E24.se business news site in Sweden.

  VandenBerg介绍了Z24的个案研究，该网站由FDMediagroep、RTLNederland和Schibsted共同投资建立，前身是Schibsted公司在瑞典成功建立的E24.se商业新闻网。

• The approach can be easily incorporated into existing RTL to gate equivalence checking frameworks and increase the robustness of equivalence checking for arithmetic circuits.

  本算法可直接结合到现有的RTL和门级网表的验证流程中，从而提高算术电路的验证能力。