英汉例句

• after the signals treated by a digital phase locked loop of zero phase-difference when phase and frequency following, this problem has satisfactorily been solved.

  采用对相位和频率跟蹤无相差的数字锁相环对同步信号进行处理可满意地解决上述问题。

• at the same time, an adaptive phase control system configuration based on coupled phase locked loop array was proposed.

  同时，还给出了利用耦合锁相环阵列内部信号实现阵列相位自适应控制的方案。

• the controller make up of tms320f2812 dsp chip, detecting circuits include sampling circuit, modulate circuit and phase locked loop and other periphery control and drive circuit.

  本文设计的控制器以tms320f2812dsp芯片为核心，加上检测电路（包括采样电路、调理电路、锁相环等）和其它外围控制和驱动电路构成。

• an all digital phase locked loop for clock recovery from e1 signal is presented.

  提出了一种从e1信号中提取时钟的全数字锁相环。

• the approaches suited for small satellite communication system are matched filter acquisition, large step delay locked loop acquisition.

  目前，适用于小卫星通信的伪码捕获方案有：匹配滤波器及大步进延迟锁定环。

• because of the fading characteristic in troposcatter channel, the mechanism of traditional phase locked loop is difficult to achieve the effect in troposcatter communication.

  由于对流层散射信道存在严重的衰落现象，故而传统的锁相环机制在散射通信中往往难以奏效。

• the primary factor affecting fast phase lock is analyzed by using matlab. then a fast all digital phase locked loop with a high precision automatic modulus control is proposed.

  应用matlab分析了影响锁相环快速锁定的主要因素，提出了一种具有高精度自动变模控制的快速全数字锁相环。

• anovel approach to implement symbol timing recovery is presented which uses a hybrid digital phase locked loop (hdpll).

  本文介绍了一种利用混合数字锁相环（hdpll）实现码元定时恢复的新方法。

• it uses a delay locked loop (dll) with a proposed quadrature phase detector to greatly reduce the phase error.

  这种方法基于一个采用提出的正交相位检测器的延迟锁定环路来大大减小正交相位误差。

• then presented the basic structure, phase model, frequency response and performance analysis for noise and spur, of phase locked loop (pll).

  然后介绍了锁相环（pll）的基本结构、相位模型、频率响应、噪声及杂散性能。

• direct synthesizing and phase locked loop are combined to implement the synthesizer. ultra-light and double shock proof and high efficiency switching power supply are used in the synthesizer.

  该合成器采用了直接合成与数字锁相相结合的方法，并采用了超轻型、双重隔振技术和高效率开关电源。

• a novel frequency and phase tracking locked loop (fptll) is proposed in this paper.

  本文介绍了一种新型频率相位追蹤锁定环路（fptll）的设计。