片语

luminous chip area发光芯片面积

Coach chip area片区教练

Especially Chip Area尤其芯片区域

In Radio Chip Area在收音机芯片区域

Gullet-to-chip Area Ratios容屑系数

silicon chip area硅芯片面积

One-chip color area sensor图像传感器类型

chip mounting area芯片安装面积

chip cross-sectional area切屑横截面面积

英汉例句

• thus, only a very small extra chip area is required even if full scan design is used.

  这样，即使采用全扫描设计，也仅需较小的芯片面积。

• a modified direct digital frequency synthesis(dds), pipelined structure, and time-sharing rom are adopted in the chip, for saving chip area and ensuring high performance and speed.

  该芯片采用了改进的直接数字频率合成算法、流水线结构与rom分时复用技术，保证了芯片的高性能和速度，节省了芯片面积。

• an increase in chip area and circuit complexity leads to a reduction in the yield of chip production. in order to get a fair yield, the fault tolerant technique is introduced into the ic design.

  随着芯片面积的增加及电路复杂性的增强，芯片的成品率逐渐下降，为了保证合理的成品率，人们将容错技术结合入了集成电路。

• an image pickup apparatus is provided that is capable of obtaining a correction value effective for horizontal noise correction, while suppressing increase in chip area of an image pickup device.

  提供了一种能够获得对于水平噪声校正有效的校正值并同时抑制摄像装置的芯片面积增大的摄像设备。

• latchup, matching and parasitic are considered to make sure the connection lines shortest and the cross points least, finally the chip area is estimated.

  在放置器件时考虑可能出现的拴锁、匹配和寄生，使其之间的连线最短、交叉最少，并对芯片面积进行了估算。

• the experimental results show that the iterative application of karatsuba's method for polynomial multiplications can reduce the chip area and energy needed to run elliptic curve cryptography.

  实验结果显示，这种方法在增加一定路径延时的代价下获得更小的芯片面积和功耗。

• the scan solution was applied to mac chip design and the adaptive scan was applied to epachip design, then we assessed the chip area and vectors loading time.

  本文在mac和epa芯片的设计中分别应用了扫描设计和自适应扫描设计，然后对面积和测试矢量加载的时间进行了评估。

• a charge scaling d/a converter with capacitor voltage divider is designed, which extends the resolution of a parallel d/a converter as well as reduces the chip area greatly.

  设计中d/a转换器采用了加电容分压器的电荷分布式结构，在扩展并行d/a转换器分辨率的同时大大节省了芯片面积。

• among various adc structures, folding and interpolating adc has the advantages of high-speed, low-power, small chip area and easiness to be compatible with digital process, etc.

  在众多a/d转换器电路结构中，折叠内插结构具有高速、低功耗、面积小及易与数字工艺兼容等优点。

• it is forecast that memories of different functions will have occupied approximately 90% chip area by 2010. thus embedded memory will become the determining factor of the whole system.

  据预测，到2010年，约90%的硅片面积将被具有不同功能的存储器所占据，嵌入式存储器将成为支配整个系统的决定性因素。

• there is no high-q rf or if band-pass filters in zero if receiver, so it is suitable for low power low chip area application.

  零中频接收机结构不需要难以集成的高q值高频或者中频带通滤波器来抑制镜像，实现低功耗较小芯片面积的设计要求。

• its circuit structure is very complex and its chip area is restricted severely by the client.

  其电路结构十分复杂，而且客户又对版图面积做了详细的规定。

• by using a ring voltage controlled oscillator(vco), chip area and production cost were saved.

  通过采用环行压控振蕩器，节省了芯片面积和成本。

• since this year, show couplet to ever also expressed publicly to there can be a few significant progresses in chip area for many times.

  本年以来，闪联也曾屡次暗地暗示在芯片区域会有一些主要进展。