片语

master processor主处理器；主处理机

Host Interface Processor主机接口处理机

HIP Host Interface Processor主机接口处理器

Host Media Processor的主机媒体处理

hc host communications processor宿主机通信处理器

host signal processor主机信号处理器

host communications processor宿主机通信处理器

host information processor[计]

host language processor诛言处理程序

host command processor主命令处理程序

英汉例句

• The host processor main control unit using STM32F103V8 achieve instrument control, wireless transceivers, alarm indicator, remote control, and work status display.

  主机采用STM 32f 103 V 8处理器为主控单元，实现仪器操控、无线收发、报警指示、远程控制及工作状态显示等功能。

• Trying to skip basic JIT compilation of certain methods that the JIT compiled into some of the ISA instructions not belonging to the set understood by the host processor hardly makes sense.

  尝试忽略对某些方法的基本JIT编译，因为那样编译得到的一些IS A指令不属于主机处理器能够理解的集合，没有什么意义。

• A number of improvements in network adapters that offload protocol processing from the host processor are provided.

  在用于从主机处理器中卸载协议处理的网络适配器方面提供了多个改进。

• Modules with microcontrollers in the system process their signals parallelly, and communicate with host processor by dual port memory.

  以单片机为核心的各传感器接口模块并行处理各传感器信号，并通过双口存储器与上位处理器通信。

• The whole system is made up of a main computer and many intelligent nodes. Each intelligent node takes on microcontroller AT89C51 as host processor and Neuron chip TMPN3120 as slave processor.

  系统由一台上位机和多个智能节点组成，智能节点采用单片机at89c51为主处理器，神经元芯片TMPN3120为从处理器。

• The IPN250 combines a single GT240 96-core CUDA GPU with an Intel Core2 Duo host processor operating at 2.26GHz and 8 GBytes of DDR3 SDRAM to deliver up to 390 GFLOPS of performance per card slot.

  IPN250结合了一个GT240 96核心CUDAGPU，英特尔酷睿2.26GHz双核处理器和8G DDR3SDRAM，可以提供每卡高达390GFLOPS的运算性能。

• You also need to know whether the JVM correctly determines host processor architecture so that the JIT compiler can produce the correct set of instructions for that architecture.

  您还需要知道JVM能否确定主机处理器的体系结构，以使得JIT编译器可以为那个体系结构生成正确的指令集。